- The WOW Alliance of Tokyo Institute of Technology (Tokyo Tech) and National Cheng Kung University (hereafter NCKU) agree on a technical partnership to promote the social implementation (practical application) of BBCube-based next-generation 3D integrated technology.
- NCKU joins Tokyo Tech WOW Alliance to promote research and development of next-generation 3D technology. In addition to personnel development, a pilot production line is set up and operated at NCKU.
- NCKU Forms BBCube Business Alliance With TECH EXTENSION Co., Ltd. (hereinafter TEX. Founded by Tokyo Tech Specially Appointed Professor Takayuki Ohba). TEX will bring the WOW and COW technologies based on the BBCube platform to NCKU.
- Strengthening the semiconductor supply chain through the Tokyo Tech WOW Alliance and the Japan-Taiwan BBCube Business Alliance. A great leap forward for the social implementation of next-generation 3D integrated technology after miniaturization.
Tokyo Institute of Technology’s WOW Alliance and NCKU have agreed on a technical partnership for the social implementation of the next generation integrated 3D technology based on BBCube (Bumpless Build Cube). This is the first Japan-Taiwanese university alliance for next-generation 3D integration processes. Commercialization plans continue through the BBCube business alliance. NCKU has joined the Tokyo Tech WOW Alliance to participate in the research and development of next-generation 3D technology. This includes the construction and testing of a BBCube pilot production line within the university and the development of the necessary human resources to run it.
A BBCube business alliance was formed with TEX, a company founded by Professor Takayuki Ohba of Tokyo Tech, Institute of Innovative Research. TEX ensures the transfer of WOW technologyand COW technology, both based on the BBCube platform, to NCKU. Procedures, equipment and materials are used based on the research of Tokyo Tech WOW Alliance.
At present, many universities and affiliated companies are participating in Tokyo Tech WOW Alliance and conducting research and development of next-generation semiconductor 3D technology. As the industry enters an era where the production yield of advanced semiconductor devices is saturated due to the increase in atomic-level invisible defects, COW chiplet integration and WOW wafer stacking technology are becoming increasingly important. Established in response to this need, this Japan-Taiwanese collaboration ensures seamless product and market alignment. It aims to promote the fundamental development of post-miniaturization 3D integrated technology and social implementation, and strengthen the semiconductor supply chain. It is planned to set up a pilot R&D manufacturing line at NCKU by the end of 2023 and sequentially apply WOW and COW production processes as BBCube platform technologies.
Scheme: WOW Alliance and BBCube Business Alliance
The Tokyo Tech WOW Alliance, which aims to support the implementation of research results into society (practical application), established TEX in 2018 as a startup company of Tokyo Tech. TEX has now entered into a business agreement with NCKU’s Innovation Headquarters to form a BBCube business alliance NCKU (Figure 1). Research services resulting from Tokyo Tech WOW Alliance are provided through affiliated company TEX Taiwan.
OSAT (Out-sourced Semiconductor Assembly and Test), device makers and other companies plan to participate in the BBCube business alliance that aims to further accelerate societal adoption.
A pilot production line for WOW/COW technologies based on the BBCube architecture will be built at NCKU and R&D will be carried out with actual equipment from the end of 2022 (phase 1). An integrated line will be established in fiscal year 2024 (phase 2). Since it will be possible to simultaneously integrate chiplets at wafer scale, this integrated line enables seamless verification at both the front and back end.
Technical overview: Next generation 3D technology BBCube
BBCube, developed by the WOW Alliance, allows to minimize cabling for all components (memory, CPU, capacitors, etc.) (Figure 2). For example, the distance between capacitors and devices can be reduced from millimeter to micron levels. The WOW Alliance collaborates on design, process, equipment and material development, including thermal design, with the aim of miniaturizing beyond “thumb size”.
Power consumption with HBMused in high-end devices such as servers is about one-fifth of traditional DDR5. In 2.5D and 3D with BBCube, when the transmission bandwidth reaches the level of terabytes per second, the transmission energy per bit is an order of magnitude smaller than HBM, and the system power consumption is the lowest in the world (less than 10 W) (Figure 3 ).
Hitherto, wiring connection requires a protruding bump electrode formed on the electrode by plating. The resistance of the bump and its high density are an obstacle to acceleration and stacking.
Bumpless technologies like BBCube can avoid such problems. The WOW Alliance has developed micron-level wafer thinning technology and multi-wafer stacking technology via direct vertical interconnects using TSV (Figure 4). By applying these technologies to DRAM, large memory capacity can be achieved by increasing the number of stacked wafers. This is especially true for AI, which requires a lot of memory. Also developed as part of this alliance is bumpless COW, which allows for minimal wiring between chips and wafers and enables chiplet integration by combining different devices.
Buttless connections in the BBCube system is a technology that minimizes the vertical connections between chips. Because there are no bumps, the resistance and electric capacity are small, and in combination with wafer thinning technology (Si thickness
Typically, in the case of DRAM chips, if the memory is partitioned within the chip and then wired vertically in parallel, long-distance signals and power can instead be transmitted in parallel over a short distance over vertical interconnects, proportional to the number of partitions that are traditionally found on the surface of the chip had to take place. This parallelism allows for lower power consumption while maintaining the same transmission bandwidth at lower transmission speeds.
Another benefit of the high-density shockless TSV is better heat dissipation. Conventionally, long TSV wires and bumps increase the temperature inside the chip when stacked due to long TSV wires and bumps. BBC technology relaxes this stack limit significantly.
- Late 2022 to early 2024: Cleanroom setup and equipment selection (Phase 1)
- Within the 2024 financial year: establishment of an integrated test production line for research and development (phase 2)
- From FY 2025: Mass production based on wafer input
- Japan-Taiwan semiconductor-related industries: providing the main BBCube technology through trial production lines
 WOW Alliance : This is an industry-academia research platform operated by the Heterogeneous and Functional Integration Unit (Ohba Laboratory) of the Institute of Innovative Research, Tokyo Tech. It consists of companies and research institutes engaged in design, processing, equipment and materials related to semiconductors. As the only R&D platform in Japan that focuses on 3D integration of semiconductors, it pioneered simple wafer thinning and stacking technology with 300mm wafers. It is also the first in the world to successfully develop 3D technology with impactless TSV Wiring.
 National Cheng Kung University (NCKU) : This is a national university founded in 1931. It is known as the top university in the central south region of Taiwan and one of six designated national research universities. Official name: 國立成功大學. Tokyo Tech and NCKU entered into an academic cooperation agreement in November 1997.
 Integrated next generation 3D technology : Next-generation semiconductor technology with wafer-level 3D integration. Based on WOW Alliance’s ultra-thinning technology and bumpless vertical wiring technology, it is possible to achieve 3D integration with semiconductors, which enables higher performance and lower power consumption than traditional products. In addition to large computing devices such as servers, assembled multifunction device systems can be greatly reduced in size.
 BBCube (Bumpless Build Cube) : Architecture that allows minimizing systems without bumps. It is a compact 3D version of a chiplet that is traditionally a flat plane.
Reference: Ohba, T.; Sakui, K.; Sugatani, S.; Ryoson, H.; Chujo, N. Review of bumpless build cube (BBCube) using wafer-on-wafer (WOW) and chip-on-wafer (COW) for tera-scale three-dimensional integration (3DI). Electronics 2022, 11, 236. DOI: 10.3390/Electronics11020236
 WOW (wafer-on-wafer) technology. : Stacking technology that allows wafers to be directly bonded and joined together. This greatly contributes to improving the efficiency of stacking wafers of the same chip size as for DRAM.
 COW (Chip-on-Wafer) technology : Technology that connects and connects chiplets on a wafer with WOW technology. By bonding the chips directly onto the wafer, high-precision processing can be performed using various types of wafer processing equipment in subsequent semiconductor manufacturing processes.
 HBM (High Bandwidth Storage) : A memory standard from JEDEC that requires Through Silicon Via (TSV) chip stacking) technology.
 DDR5 SDRAM (Double Data Rate 5 Synchronous Dynamic Random Access Memory) : A type of DRAM standard consisting of semiconductor integrated circuits. It is used as the main memory of a computer as a memory module (DIMM = Dual Inline Memory Module) in which multiple DRAM chips are mounted on a printed circuit board. Compared to the previous generation of DDR4 SDRAM, DDR5 has twice the bandwidth and consumes less power.
 TSV (Through Silicon Via) : A connection hole (via) opened through the silicon wafer. The chips stacked vertically are connected by embedded wiring. Since wiring has recently been performed for materials other than silicon, it can also be called vertical interconnection during front-end processing.